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Lead development of iJTAG (IEEE 1687) test solutions and DFT methodologies (scan, BIST, hierarchical access). Build ML features for pattern compaction, failure prediction, and root-cause analysis. Develop scalable automation frameworks in Python/C++, streamline workflows with Tcl/Perl/Shell, and create APIs/pipelines for large-scale ATE log and pattern ingestion, processing, and visualization.

The role involves providing pre-sales and post-sales support for semiconductor testing, including project delivery, customer consultation, and technical training.

Design, maintain, and operate automated build and CI/CD pipelines across Linux and Windows. Manage nightly, integration, and release candidate builds, versioning and branching, packaging, and delivery of customer-ready releases. Debug build failures, optimize build infrastructure, and support deployments and issue resolution with R&D, validation, and support teams.

Design and develop features for the SiConic semiconductor validation platform, implement and optimize test execution, DFT integration, and automation. Develop and debug test flows and integrate components, collaborate cross-functionally, troubleshoot software/hardware interfaces, contribute to architecture and prototypes, and support validation tooling and automation frameworks.