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Nokia

Senior ASIC Design Engineer

Sorry, this job was removed at 05:52 a.m. (IST) on Friday, Aug 21, 2026
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Remote or Hybrid
Hiring Remotely in India
Senior level
Remote or Hybrid
Hiring Remotely in India
Senior level

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Lead ASIC design automation and CAD/methodology development. Build and maintain RTL IP, create synthesis/STA flows, script automation (Python/Perl/TCL/Shell), support EDA tools/LSF and CAD infrastructure, collaborate with designers and vendors to deploy production flows and improve ASIC development efficiency.
The summary above was generated by AI

In an increasingly connected world, the pandemic has highlighted just how essential telecom networks are to keeping society running. The Network Infrastructure group is at the heart of a revolution to connectivity, pushing the boundaries to deliver more and faster network capacity to people worldwide through our ambition, innovation, and technical expertise

 Join Optical Networks division, where innovation meets scale in the AI-driven data center era. With the recent acquisition of Infinera, we’ve united two industry leaders to create an optical networking powerhouse—combining cutting-edge technology with proven leadership to redefine the future of connectivity.

Infinera is now part of the Nokia Corporation and its subsidiaries. When you apply, the information you share will be handled with care and used only for recruitment purposes within the group.
Work as part of a world class ASIC design team, building leading edge chips for the Coherent Optics market.
 

Responsibilities

As a member of the ASIC design team, you will play the role to automate cad flows for ASIC design

The candidate:
Develops and maintains key common RTL IP modules used at every product generation 

  1. Interacts with RTL designers to understand the flow of work, develops the architecture to automate the flow and then implements the automation to eliminate pain points and errors to de-risk projects.
    2.Develop Synthesis flows and run synthesis along side with other designers and provide feedback to designers to improve timing and power.
    3. Develops scripts to automate using Python, Perl or other scripting languages. 
    4. Works as part of a methodology team to develop new CAD/methodologies or flows which improve quality of design, reduce design time and provide consistent and reliable results across users and sites and streamline the process of ASIC development.
    5. Identifies input variables, categorizing them as fixed or customizable or user controllable options allowing users to have simplified interaction with the tool flow. 
    6. Identifies scope for improvement in existing flows and implement those improvements.
    7. Work with experts and users across sites to identify new methodologies for development and adoption.
    8. Works with EDA tool vendors to identify options available across tools which reduce debug and development effort. Takes the options and make them available in a simplified way to design engineers.
    9. Works with EDA tool vendors to evaluate new tools and new features.
    Develops flows, take it through a proof-of-concept on a project and release the flow for production use across teams and sites.
    10. Makes presentations to teams to ramp users about improvements or new flow development.
     

Works on EDA tool installation and support, compute platform support, LSF job submittal support, infrastructure related support for worldwide ASIC design community.  Works closely with IT and debug and implement solutions.  Continuously monitor/improve CAD infrastructure efficiency and CAD automation. 
The job is a high visibility job and has the potential to improve and impact the work of multiple engineers across geographies.
 

Qualifications
  1. Hold a Bachelor or master’s degree in electrical or computer engineering

  2. Have a minimum 5 years of experience with relevant experience

  3. Have a minimum 2 years of RTL design experience 

  4. Strong experience in Synthesis, STA and constraints development

  5. Strong working experience of Shell, Perl, TCL and other programming/scripting language

  6. Strong problem-solving skills

  7. Good verbal/written communication skills and teamwork

  8. Knowledge of Synopsys Electronic Design Automation (EDA) tools an asset

  9. Knowledge of Verilog or System Verilog 

  10. Knowledge of LSF 

  11. Knowledge of machine learning and/or neural networks may be an asset
     

About the Team

Some of our benefits in India:

  • Flexible and hybrid working arrangements to support work–life balance
  • Health and well-being support – medical insurance for you and your family, health check-ups, life and accident insurance, well-being programs, and employee resource groups 
  • A minimum of 90 days of Maternity and Paternity Leave based on eligibility
  • Personal Support Service 24/7 – a confidential support channel open to all Nokia employees and their families in challenging situations
  • Career growth & mobility – technical career paths, job rotations, international assignments, and relocation support
  • Continuous learning – technical certifications, mentoring programs, coaching, and digital learning platforms
  • Opportunities to innovate and contribute through Nokia’s research and development environment
  • Recognition programs that celebrate outstanding contributions
  • Workplace support – ergonomic working support and mobile device programs based on eligibility

Nokia Gurugram, Haryana, IND Office

Sector 62, , Ghata, Gurugram, Haryana, India, 122102

Nokia Gurugram, Haryana, IND Office

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